Forum Discussion
2 Replies
- Altera_Forum
Honored Contributor
I don't think flash programming using SVF or JAM will be very fast, but you can create these files with quartus_pgm providing you have a PFL block in the FPGA which can access the pins.
If you have an FPGA image with the appropriate hardware (Nios II or PFL) controlling the flash then you could use nios2-flash-programmer or quartus_pgm to push the data into the device. On SoC chips I think quartus_hps can program flash which is visible to the HPS. - Altera_Forum
Honored Contributor
Thank you for your reply. It will not be fast. But of course it's probably a lot faster to load a PFL first and then load some compressed content (which the SOF/SREC file is, compared to the FLASH programming command sequence) to the PFL and/or run the FLASH interface at a higher speed.
I was thinking about the simplicity of having just the SOF/SREC, BSDL file, and a list of the pins connected to the FLASH.