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Altera_Forum
Honored Contributor
16 years agoFixed Point Multiplication in Verilog or Quartus II
Hello, I plan to implement a controller digitally in my FPGA & it involves numerous fixed-point additions, multiplications & divisions. Therefore here is a generic question: Suppose ...
Altera_Forum
Honored Contributor
16 years agoThe method is correct, if you can be sure, that no overflow occurs. Generally you can't, I think.