FIFO based on DDR

In the simpliest form if you made a logic block that turned a single port memory interface into a dual port interface, then you could just hook the ddr up to one side, then use the standard fifo logic from somewhere say opencores.org to interface with the dual port side. I think specific applications may bring about performance advantages, if say you can deal with a packet basis.

Another thought, what if you used the SOPC builder and did a little mix matching of parts? Don't really know specfically, but you may be able to make something work there although it probably will not be the fastest.

Just tossing out ideas.

kevin