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SKhan10's avatar
SKhan10
Icon for New Contributor rankNew Contributor
7 years ago

FGPA Reset Issue

Hallo Please have a look at the attached bdf file. we used the reset circuit as recommended by Quartus. Still the design does not get reset properly every time when the reset is pressed. Any sugges...
Vicky1's avatar
Vicky1
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

Can you please debug the small circuits with Modelsim using testbench ,

  1. Only for first two Flipflop circuit
  2. Including FPGA inst. circuit
  3. Including last four Flipflop circuit

Refer the below handbook for SDC,

https://www.intel.cn/content/dam/altera-www/global/zh_CN/pdfs/literature/hb/qts/qts_qii51006.pdf

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)