Failed to simulate project that contains VQM file

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Using Modelsim-Altera Starter edition I failed to simulate project that contains VQM file.

All output signals from VQM file are drawn red U (undefined).

This happened when performing from Quartus II 10.1sp1 Web Edition:

Tools => Run EDA simulation tool => EDA RTL simulation

Best regards,

Rami

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Hi,

there are serveral reasons for getting undefined signals. Did you try an RTL simulation upfront ? Do you get warning about timinf violations during the simulation of the VQM file ?

Did you have a reset implemented in your design ? Another reason could be that parts of your logic is removed by the synthesis tool. Have a look to the result files of the Quartus run.

Kind regards

GPK