Failed to route the following signal

The errors are rather clear: your design is too big for that device.

I believe you have already check the right device is selected, right?

Then, are you sure your VHDL project should actually fit into it?

Maybe you badly instantiated some components and the design generates a lot of extra logic you actually don't need. Or maybe you defined some memory components with a width not matching the fpga memory blocks width and this unexpectedly waste resources.

Regards