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TYilm2
New Contributor
New ContributorExporting and importing design partition
Hello, Please tell me what am i doing wrong? I have project. I would like to mek an IP of it or something that my students can not see the contents (VHDL code). VHDL code I do not want to provide. H...
TYilm2New Contributor
New ContributorDear Kyeoh, Thanks for answering. I tried all possibilities including Post-Synthesis. I stil get the same problem. I almost give it up. Is there any other way to do it without providing the sources?. Thanks again.
