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TYilm2's avatar
TYilm2
Icon for New Contributor rankNew Contributor
7 years ago

Exporting and importing design partition

Hello, Please tell me what am i doing wrong? I have project. I would like to mek an IP of it or something that my students can not see the contents (VHDL code). VHDL code I do not want to provide. H...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

You may remove the conflicting location assignments or recompile the specified partitions by setting the Netlist Type of Post-Synthesis for the specified partitions.