Experienced Xilinx tool user needing Altera tool help

OK....I was about to open the golden top design before sending my last update. I should have. The golden_top module does provide the mapping between the FPGA I/O components and their names. For example, FPGAIO_P = USER_LED_FPGA[0]. So, that at least answers part of my remaining confusion. I'm still not clear on why there are only two HPS_LED pin assignments, when the board has for HPS LEDs. I guess I'll continue to explore the golden design while waiting for somebody to possible clarify.