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Altera_Forum
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9 years ago

Experienced Xilinx tool user needing Altera tool help

Good Day, I've had a DK-SOC-10AS066S-A dev kit with a 10AS066N3F40E2SG device in it for quite a few months. I'm just now starting to use it on a POC project (at Intel). I'm also doing a Xilinx ...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

OK....I was about to open the golden top design before sending my last update. I should have. The golden_top module does provide the mapping between the FPGA I/O components and their names. For example, FPGAIO_P = USER_LED_FPGA[0]. So, that at least answers part of my remaining confusion. I'm still not clear on why there are only two HPS_LED pin assignments, when the board has for HPS LEDs. I guess I'll continue to explore the golden design while waiting for somebody to possible clarify.

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