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Altera_Forum
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11 years ago

expecting a description

Hi, what is the meaning (and reason) of syntax error: 10170 Verilog HDL syntax error at lights.v(6) near text ";"; expecting a description (line 6 is the "endmodule"; using 13.01 Quartus; I...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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Thank you, really. (BTW: I think an empty instruction should be tolerated, and the error message could be more informative).

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FYI, moving to SystemVerilog will allow the null statement.