Example Design compilation does not run on FPGA (newbie needs help)

Hello there,

I am currently trying to get into OpenCL Programming for FPGAs.

I followed Intels "aocl_c5soc_getting_started" guide (I've got a DE10-Standard).

I eventually got the emulation up and running, but i have huge probelms with the

cross-compilation of the host aswell as the actual Kernel compilation.

I compiled the Kernel with the environment Variables set as described in the guide.

 aoc -board=c5soc_sharedonly device/vector_add.cl -o bin/vector_add.aocx

This command exited after around 30 minutes with 2 warnings and 0 errors.

The Image which i downloaded from Terasic already contains a working kernel and

executable so i tried to swap out their kernel with mine and it did no longer work. (At this

point I was not able to compile the host so I thought to give the swap a try to verify wether

the kernel is working correctly)

So now onto the Host compiling problem. So i start by setting up the environment variables

as before and ran make, which had a warning about libacl_emulator_kernel_rt.so missing.

Now that i had the kernel and the host i tried running it on the FPGA and got error message

./host: error while loading shared libraries: libintel_soc32_mmd.so: cannot open 
shared object file: No such file or directory

I found this guide on Youtube https://www.youtube.com/watch?v=npeuaj-mfvy&index=3&list=rd4pukzi14mly

and he switch into the embedded shell for compiling, but after doing

so I only got another error Message stating

arm-linux-gnueabihf-g++: error trying to exec 'cc1plus': 
execvp: file or directory not found

which is probably because the cc1plus in the path is a 32bit ELF.

Further Information:

I am Running in Ubuntu 16.04 and use IntelFPGA OpencSDK 18.0.

The Board I use is the Terasic DE10-Standard (Cyclone 5 SoC)

Environment Variables are set up as follows

$ cat exports
export ALTERAOCLSDKROOT="/home/daniel/intelFPGA/18.0/hld"
export INTELFPGAOCLSDKROOT=$ALTERAOCLSDKROOT
export QUARTUS_ROOTDIR_OVERRIDE="/home/daniel/intelFPGA/18.0/quartus"
export AOCL_BOARD_PACKAGE_ROOT=$ALTERAOCLSDKROOT/board/c5soc
export PATH=$ALTERAOCLSDKROOT/bin:$QUARTUS_ROOTDIR_OVERRIDE:$PATH
export LD_LIBRARY_PATH=$ALTERAOCLSDKROOT/host/linux64/lib:$AOCL_BOARD_PACKAGE_ROOT/linux64/lib:$LD_LIBRARY_PATH
export LD_LIBRARY_PATH=$ALTERAOCLSDKROOT/board/s5_ref/linux64/lib:$LD_LIBRARY_PATH
$ source exports

Thanks and kind regards, Daniel.