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Altera_Forum
Honored Contributor
8 years agoExample Design compilation does not run on FPGA (newbie needs help)
Hello there, I am currently trying to get into OpenCL Programming for FPGAs. I followed Intels "aocl_c5soc_getting_started" guide (I've got a DE10-Standard). I eventually got the emulation up ...
Altera_Forum
Honored Contributor
8 years agoTerasic has an OpenCL document that outlines how to set up the environment and compile and test kernels for your board which you can find here:
http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=205&no=1081&partno=4 It seems you are not even using the correct BSP; the BSP you are using is Inetl's reference BSP. You need to use Terasic's custom BSP for your board which you can also get from the above URL. Also it is probably best to first try with Quartus/AOC v16.1.2 since the BSP might not be fully compatible with the latest version of Quartus/AOC.