Honored Contributor
Honored ContributorAre you using a third-party synthesis tool? If so, this is probably one of the cases where you have to tell the tool not to put an I/O cell ATOM between the port of the black box where you instantiated the memory interface IP and the top-level port corresponding to the device pin. If the IP has the I/O cell ATOM ("WYSIWYG I/O primitive" in your message), then the third-party tool needs to connect it up the hierarchy to the device pin with a simple wire connection in the .edf or .vqm file.
If you are using Quartus integrated synthesis, maybe you have some logic between the I/O cell ATOM in the IP and the device pin. Or maybe you just failed to make the connection in the RTL.
