Forum Discussion
CPaul
New Contributor
6 years agoHere is the QAR file. I am a beginner VHDL coder so please bear with me if I am confused by simple concepts.
Thanks
AnandRaj_S_Intel
Regular Contributor
6 years agoHi @CPaul ,
I can simulate your design without any error
Compile all the vhd files again in proper order try.
attached transcript from which you can find the information on error which i have faced because of compile order and image.
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Regards
Anand