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gyuunyuu
Contributor
ContributorError related to defparam in Qsys system containing Nios
I am trying to simulate a Qsys system containing Nios II and custom Qsys peripherals. I am using Quartus 18.0 and ActiveHDL 10.5a. The error that shows up at start of simulation is: # ELAB2: Fatal...
gyuunyuuContributor
ContributorIt seems that this error occurs because VHDL version of altsyncram is being instantiated in Verilog code of the Nios and passing defparam to generic does not seem to be working correctly.
The altsyncram is defined inside two places altera_mf.v and altera_mf.vhdl. My testbench compiles the VHDL variant. If I compile the Verilog variant then this error goes away.
