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Altera_Forum's avatar
Altera_Forum
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17 years ago

Error from two signal going to one output

I'm trying to make a pair of tristate buffers that are switched by an input as shown in the included picture. My problem is that I'm getting an error that says I cannot send two signals to the same o...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I never heard that internal three-state buffers are available in ASICs, they surely don't exist in FPGA. The assumption, that three-state buffers have a better performance than multiplexers seems rather arbitrary to my opinion.

There have been previous discussion about puf design in the forum before. As one point, it seems questionable if the accidental delay skew, that is utilized by this technique, has a considerable amount compared to systematic and reproducable routing delays.