Error during Flash based system compilation

Two lines of the trace give me a clue but not how to solve it:

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Warning (10230): Verilog HDL assignment warning at altera_merlin_width_adapter.sv(958): truncated value with size 24 to match size of target (8)

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and:

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Error (10198): Verilog HDL error at altera_merlin_width_adapter.sv(433): part-select direction is opposite from prefix index direction

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Each of these suggest things may not be connected up as intended. How are you instantiating your qsys module? It looks like "off_chip_mem" is your top level Qsys entity - right? So, you're just throwing your generated Qsys output at Quartus - no higher level vhdl module...?

Cheers,

Alex