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Altera_Forum's avatar
Altera_Forum
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17 years ago

"Error: Cannot hold value outside clock edge" ?

Hello, I am trying to compile a VHDL code written by another person. I am getting this error for a number of signals. --- Quote Start --- Error (10818): Can't infer register fo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

try:

if(Clock'Event and Clock='1') then

if(PLLValid='1')then

I_PLLOutput<=CONV_INTEGER(PLL);

S_PLLValid<='1';

elsif(S_PLLValid='1') then

S_PLLValid<= not S_PLLValid;