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Altera_Forum's avatar
Altera_Forum
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8 years ago

Error (18496): The Output SCLK in pin 26 is too close to PLL clock input in pin 27

Hello everybody, I am using the Max10 chip with the Quartus Prime 17.1. I am building a SPI interface for ADC. The input pin for my on-board quartz oscillator is the pin 27 (bank 2). I have des...
CKPope's avatar
CKPope
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3 years ago

I am tasked with getting our Quartus tools running for one of our university course offerings. The development board that is used was designed in 2015 and the Quartus Tools (Altera Quartus Prime v15.1) were used as part of the pin assignments and fitting etc. It has served us very well.

We have the board running with the an LED output driving pin 28 with no issues. But our Altera Quartus v15.1 tools have expired. So we are looking at migrating to the newer tools. But we need to override this Fitter problem.

Using newer versions of the Quartus tools (v16.1 and later), the same fitting error described above became evident.

Is there a tcl command that can be used to ignore this error?