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Altera_Forum's avatar
Altera_Forum
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7 years ago

Error (169281): There are 469 IO input pads in the design

I get the following error message in Quartus when I compile my code:

Error (169281): There are 469 IO input pads in the design, but only 293 IO input pad locations available on the device.

However it works fine when I compile the same VHDL code in VT System FPGA Manager (Vector tool).

I am using Cyclone IV E EP4CE75F23I8L.

Since I am using a Vector board there are a number of IO ports that are set by default in the main HDL file. Do I get this error because Quartus does not know which board I intend to use?

Also, is the error message referring to the IO pads available on the FPGA or on the board?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    7 years ago

    Quartus doesn't know anything about your board. Check the Pin Planner to make sure your I/O location assignments are set correctly, but it clearly seems like there are too many I/O in your design for the device you are targetting. I don't know what VT System FPGA Manager is (is that a synthesis tool?).

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    7 years ago

    --- Quote Start ---

    Quartus doesn't know anything about your board. Check the Pin Planner to make sure your I/O location assignments are set correctly, but it clearly seems like there are too many I/O in your design for the device you are targetting. I don't know what VT System FPGA Manager is (is that a synthesis tool?).

    --- Quote End ---

    VT System FPGA Manager is a tool from the company Vector that executes Quartus for compilation of the VHDL code, and uses its board as target. When I do it directly on Quartus it doesn't know anything about my board so I should probably stick to the VT System FPGA Manager but the problem is that the compilation takes forever (over 1.5 hours) and I had to cancel because I couldn't wait for it so long.

    However compiled a similar design before, and it only took 20 minutes, don't know why It takes so much time now. It is almost the same design. Just added some input ports.