--- Quote Start ---
Quartus doesn't know anything about your board. Check the Pin Planner to make sure your I/O location assignments are set correctly, but it clearly seems like there are too many I/O in your design for the device you are targetting. I don't know what VT System FPGA Manager is (is that a synthesis tool?).
--- Quote End ---
VT System FPGA Manager is a tool from the company Vector that executes Quartus for compilation of the VHDL code, and uses its board as target. When I do it directly on Quartus it doesn't know anything about my board so I should probably stick to the VT System FPGA Manager but the problem is that the compilation takes forever (over 1.5 hours) and I had to cancel because I couldn't wait for it so long.
However compiled a similar design before, and it only took 20 minutes, don't know why It takes so much time now. It is almost the same design. Just added some input ports.
Honored Contributor
