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yy1's avatar
yy1
Icon for New Contributor rankNew Contributor
5 years ago

Error (14566): The Fitter cannot place 4 periphery component(s) due to conflicts with existing const

Hi, How can fix the errors? I really can't understand Error (175001): The Fitter cannot place 1 HSSI_PMA_CDR_PLL, which is within Transceiver Native PHY Intel Arria 10 FPGA IP edp_rx_phy_16b_a...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Based on the fitter error report, likely there is an pin placement issue on either your CDR refclk pin or transceiver Rx channel pin


I can help to review your design if you can share your archived design QAR file here.


Thanks.


Regards,

dlim


yy1's avatar
yy1
Icon for New Contributor rankNew Contributor
5 years ago

Use tool : Quartus 18.1 prime standard

Family: Arria 10

Device: 10AX115S3F45E2SGE3

below is design (rx_cdr_refclk0 = 100MHz)

pin planner

set_location_assignment PIN_AC8 -to rx_cdr_refclk0
set_location_assignment PIN_AC7 -to "rx_cdr_refclk0(n)"
set_instance_assignment -name IO_STANDARD LVDS -to edp_ref_clk_p

set_location_assignment PIN_H5 -to rx_serial_data[0]
set_location_assignment PIN_G7 -to rx_serial_data[1]
set_location_assignment PIN_F5 -to rx_serial_data[2]
set_location_assignment PIN_E7 -to rx_serial_data[3]

set_location_assignment PIN_H6 -to "rx_serial_data[0](n)"
set_location_assignment PIN_G8 -to "rx_serial_data[1](n)"
set_location_assignment PIN_F6 -to "rx_serial_data[2](n)"
set_location_assignment PIN_E8 -to "rx_serial_data[3](n)"

set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data[0]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data[1]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data[2]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_serial_data[3]

  • yy1's avatar
    yy1
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi dlim,

    If I try to modify design as below, the error message disappear,

    but the source ref clk of the frequency of rx_clkout_16b and rx_clkout_20b are different make 16_to_20bit_fifo module error.

    Therefore, I want to use the original design.

    What's the problem of the original design?