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Altera_Forum
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11 years ago

Error 10500

Hi, i have problems with my vhdl code. This is the code: LIBRARY IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use ieee.numeric_std.all; ENTITY brake_var IS ...
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Altera_Forum
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11 years ago

i did that but i got 22 errors like this one :Error (10818): Can't infer register for "D[0]" at ppp.vhd(47) because it does not hold its value outside the clock edge

do you have any idea what should i change next ?