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A VHDL compiler "forgets" about the included libraries between two entities or architectures (I don't remember which one). You must re-include the ieee library and ieee.std_logic_1164.all package before each entity.
It is usually recommended to put only one entity per file.
Is there a reason why you use the unresolved std_ulogic type instead of the more usual std_logic?
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There is one good reason - all multiple driver errors are picked up at compile time rather than elaboration. Ideally, everyone would use std_ulogic unless they were building a tri-state bus.
The problem is everyone uses std_logic and so to avoid all the type casting, we all stick to one thing.
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