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Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- In a combinational design you need to care that output signals are set in all branches of a conditional statement. If you review the decoder process, you'll realize that it's not the case for sign and ofv. The error message is clearly explaining the issue, by the way. Simply add a default assignment as first process statement, e.g. sign <= '0'; ovf <= '0'; --- Quote End --- Thank you for helping me out! :)