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Oh.. Yes..sorry. i forget to post the first file.. with the definition of subtype and type.. so i correct y_den into array32to2 but the error of "+" don't change..
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
use ieee.numeric_std.all;
use ieee.std_logic_signed.all;
PACKAGE width_bit_signed IS
SUBTYPE BITS16 IS signed(15 downto 0) ; --11bit
SUBTYPE BITS32 IS signed(31 downto 0); --22bit
TYPE ARRAY16TO3 IS ARRAY (0 TO 2) OF BITS16;
TYPE ARRAY32TO2 IS ARRAY (0 TO 1) OF BITS32;
TYPE ARRAY32TO3 IS ARRAY (0 TO 2) OF BITS32;
END width_bit_signed;
Mh... i compile this program last week and it function ..then i change the size of the register into 11 and 22 bit instead of 16 and 32 and it don't function so i rewrite the original program with 16 and 32 bit but.. there is alway the error that don't recognize "+" why????:confused::(
thank for your response Tricky..
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at 19:40 i resolve my problem when i rewrite i don't put y like an array but only single register..
sorry.. i'm tired.. all day in front of the pc.. and so i write crazy code...
Thank you Tricky!:-P
Can i engage you like my personal debugger??? :o
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