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pdewanga's avatar
pdewanga
Icon for New Contributor rankNew Contributor
3 years ago

EMIF using AXI4 Interface for Controller in DDR4

Hi team,   I am trying to connect the emif ctrl_avmm Interface with the AXI Bridge. There are some warning in the system message which I could not get rid off, Also there are error while doing synt...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi Piyush,


For EMIF IP, the example design can be generated with traffic generator module to simulate the design.

The example design will only available in avalon interface connection.

To connect the EMIF IP into AXI4 interface, you may need to have an avalon to axi bridge.

This can be done by using avalon bridge to axi bridge then export the axi interface.


For the errors that you are facing, try to use reset controller and clock controller IP and the EMIF IP should use a dedicated PLL clock for reference clock.


Regards,

Adzim