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pdewanga's avatar
pdewanga
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3 years ago

EMIF using AXI4 Interface for Controller in DDR4

Hi team,   I am trying to connect the emif ctrl_avmm Interface with the AXI Bridge. There are some warning in the system message which I could not get rid off, Also there are error while doing synt...
pdewanga's avatar
pdewanga
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3 years ago

Hi,

Little correction, I am able to Generate the HDL but not the Testbench System out of this connection I made (attaching the screenshot).

My question are as follows:

Que.1 how to simulate this configuration of emif+axi_bridge in the Simulation setup?

Que.2 Are any BUS Functional model available for DDR4 SODIMM and where to get it?
Que.3 Is this correct way to create the AXI4 to avalon transaction for ctrl_amm for emif ?

please suggests your inputs.

Thanks

Piyush