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Altera_Forum
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8 years ago

Efficiency improvements after switching to 17.1 from 17.0

Just as an FYI: I noticed significant resource savings on the same code when switching to version 17,1 of the tool from version 17.0. I'm not sure if this is common for new releases of this tool but...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

If you are experiencing that behavior on the exact same kernel, you should consider reporting it to Altera since it might be a bug. However, execution time or event time during simulation do not represent anything meaningful; i.e. lower emulation time on a kernel does not mean it will also be faster on the FPGA. Hence, you should avoid drawing any conclusions based on simulation time.