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Hi guys,
A bit of topic but I need some help:
I recently updated to 17.1 from 17.0, and now the configuration is using JTAG instead of PR via PCIe.
Can't find documentation about this in the update, and "ACL_PCIE_USE_JTAG_PROGRAMMING=0" doesn't work.
Anyone know what's going on? Configuration via JTAG is so much slower than PCIe...
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Check the project folder that the OpenCL compiler creates and see if you have a "top.done" file in it or a "flat.done" file. There was another thread in the forum before that seemed to suggest that people are being defaulted to the flat flow in v17.0. If you compile with the flat flow, reconfiguration can only be done using JTAG.
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