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ToddW's avatar
ToddW
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Driver and associated documentation to interface to PCIe Hard IP for Cyclone V

We're developing a couple 3U OpenVPX PCIe peripheral boards. I have a Cyclone V GT Dev Kit, but can't locate any information on drivers used to Tx/Rx data and configuration for the PCIe HardIP inter...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi Sir,

For PCIe DMA example, you can refer to the AN690. As I can see, it came with linux and window application driver, but the detail information of how to create the driver is not available.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an690.pdf

The PCIe support 100Mhz reference clock, you can locate it closer to the transceiver bank of PCIe, I don’t see the DCR option as reference clock is available in user guide, please share with us if there is a document mentioned cyclone V support DCR as reference clock. As for the Instructor-Led courses, you can try to request a class in your region (from the bottom of the link).

In term of configuration, it is up to the designer to decide base on their requirement, if there is no concern of the configuration time, then you may just choice the method that you are familiar and comfortable. Perhaps, you can open a new thread to discuss this in detail if needed.

Regards -SK