New ContributorDoubts about the implementation of I2C in my FPGA
Good morning,
I am designing a communication between my FPGA MAX10 and my microcontroller. The FPGA detects some hardware faults from different sources and then it communicates to the microcontroller with a decoding communications (5 data lines with read enable from FPGA to uC, there can be 20 faults, if it is active the fault nº5 it sends 00101 and so on). So I use 7 pins to communicate wit hte uC. I am increasing my project and I am having problems with the numbers of pins that are routed to the FPGA. So I thought to send those faults with another communication and I thought about the I2C (only 2 pins).
I saw in the IP Catalog the I2C Slave To Avalon-MM Master Bridge Intel FPGA IP. What I would like to know is if this IP can be used to communicate with I2C with an external microcontroller (texas family) and not having problems. I am new designing FPGAs and I get usually lost with comms.
I will wait for your answer. Have a nice week.
BR,
Pedro
- Hi,
does your FPGA design an embedded processor (Nios or HPS)? If not, Avalon ST I2C master is most likely not the appropriate solution due the large amount of registers that must serviced by your FPGA code. I'd rather think about importing an open source I2C master design or possibly extracting the controller core from Avalon ST master IP.
In terms of resource overhead, a SPI like interface (simple shift register) would be usually preferred.
