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Dangranla's avatar
Dangranla
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10 months ago
Solved

Doesn't generate CXL testbench for example design

Hi, As I follow the《Agilex™ 7 R-Tile Compute Express Link* (CXL*) 1.1/2.0 FPGA IP Design Example User Guide》generate the example desing. Trying to simulate the testbench withe VCS or Questsim, ...
  • RongY_altera's avatar
    10 months ago

    Hi,

    Please check if Questa tool is installed and EDA Tool Settings has Questa selected.


    Regards,

    Rong