Does the order of the timing constraints make a difference to the Fit?

Theres basically two paths, a real path and imaginary, in two separate entities, so there should be only 4 DSP slices for A. But the problem is A -> B has rounding and saturation logic, so I get a load of failed paths because each bit of B is affected by the high bits of A.

I just had a brainwave - dont the DSP slices in S4 have different round and saturate modes? currently the mult is done with an lpm_mult megafunction (not my code). Would we be better served using a multadd block instead so we can specify the round/saturate in the DSP block, rather than do it in logic.