Does Quartus support using a VHDL configuration as a top-level entity?

The question title says it all. I thought it would be pretty straightforward to do so, since Quartus already handles most of the configuration capabilities of VHDL, and this should be possible as specified in the language standard.

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entity nand_gate is
    port (
        a, b: in bit;
        y: out bit
    );
end;
architecture dataflow of nand_gate is
begin
    y <= a nand b;
end;
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entity xor_gate is
    port (
        a, b: in bit;
        y: out bit
    );
end;
architecture dataflow of xor_gate is
begin
    y <= a xor b;
end;
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entity logic_function is
    port (
        a, b: in bit;
        y: out bit
    );
end;
architecture dataflow of logic_function is
    component gate_component is
        port (
            a, b: in bit;
            y: out bit
        );
    end component;
begin
    gate_instance: component gate_component
        port map (a => a, b => b, y => y);
end;
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configuration logic_function_cfg of logic_function is
    for dataflow
        for gate_instance: gate_component
            use entity work.nand_gate;
        end for;
    end for;
end;
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