Forum Discussion
Balaji_G_Intel
New Contributor
7 years agoDLATCH inferred as combinational loop on a specific condition
Warning (332125): Found combinational loop of 2 nodes File... Warning (335091): The Timing Analyzer found 1 latches that cannot be analyzed as synchronous elements. For more details, run the Check T...
sstrell
Super Contributor
7 years agoCan you provide the RTL code? It sounds like you've accidentally inferred one or more latches in your design, which should be avoided.
#iwork4intel
- Balaji_G_Intel7 years ago
New Contributor
I'll ping you to share the code.
Thanks