Dividing a negative number

By dividing the number by 32...

Division by a power of two is simply removing that many LSBs from the number, it takes no combinational logic what-so-ever.

32 is 2^5, so you need only remove the lower 5 bits of the number and the division is done.

If you want the output width to stay the same, then for a signed number, simply replicate the MSB to fill the gap.

    {{(5){a}},a}

Where "MSB" is the width-1 of the signal you are dividing.

Alternatively, do an arithmetic shift:

    $signed(a)>>>5

Will do the same thing.

The examples I gave are in Verilog. I realise this is the VHDL forum, but I am not familiar with the language. There will be an equivalent in VHDL.