Forum Discussion
Altera_Forum
Honored Contributor
17 years agoUse virtual pins for all top-level ports of this portion of the design that are not device pins in the full design and that are not a clock. The assignment for this is in the Assignment Editor. Virtual pins are documented in the Quartus handbook.
Virtual pins are meant for compiling one portion of the design for bottom-up incremental compilation. I don't know whether you'll run into any simulation issues with them.