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Altera_Forum's avatar
Altera_Forum
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13 years ago

differential signals on pins - schematic assignment

On the schematic I have an input named clock. In reality this should be a differential signal. Meaning, I should assign two pins instead of one.

Likewise, I have LVDS outputs coming from an LVDS Megafunction. These are also single signals on the schematic. And they should have differential pins assigned.

The Pin Planner somehow is not supporting this...

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    As in HDL design descriptions, you'll connect the positive pin only in the schematic. The negative pin is assigned automatically by selecting a differential IO standard.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Thanks, that is somewhat counter intuitive and should be mentioned on a prominent place.