Design works on Quartus 7.1 but not 4.2

I run into these quite a bit(although it's usually in the other direction, when someone upgrades to a new version and something stops working). Most of the time it's a timing issue, where the user didn't have IO timing constraints, they had recovery/removal issues, an asynchronous transfer was done incorrectly, etc. My two recommendations are:

1) Enter timing constraints for the entire design(all clocks, all clock transfers, all I/Os).

2) Debug this from the perspective that the design doesn't work, and to a certain degree ignore that it works in Q7.1.

I've seen people spend weeks doing crazy things to figure out what could be different between the two projects. They export VQMs back and forth to take out synthesis, they study .qsfs and try all sorts of settings. They try to back-annotate logic, etc. In the end, it's almost always easier to just debug the problem like you would any other problem(use signaltap to capture failures, then work your way back to the source of the error, scope the IO, etc.). This is almost always much faster, and usually when you find it, you'll knock yourself in the head and realize it makes sense. I've had two users who were convinced Q7.2 broke their design, but when they finally figured it out(wasting a lot of time comparing the two, and finally going to traditional debug methodologies), they found one was an unconstrained path, and another was due to a code change(that wasn't supposed to affect anything).