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Altera_Forum's avatar
Altera_Forum
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17 years ago

Design Being Removed

Hi, When I synthesize my design solely, the report is fine. But when I put it in an SOPC built design, only the top module which has only two pins (clock and a key) is left after synthesis. To ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I see the point. I think I'm going to make an output of some sort :) Thanks for the help,

Kaveh