Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Define internal signal as a base clock?

I have a problem performing timing analysis on a design. I'm using the Classic timing analyser. Suppose I have a device which has many (low speed) inputs on seprate physical pins, and I need to...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I filed a service request asking that both on-line solutions found by Frank be checked for correctness (see post# 8 in this thread from FvM). Neither one is available now. I suspect they were removed because of my service request. I think the one for a 4-to-1 multiplexer was incorrect, and the one for FLEX devices needed to be updated for all relevant device families.