Alexander_Kobler
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New ContributorDecrypt verilog file
Hello,
How can I read an IEEE 1735 encrypted file (vendor specific key) into Quartus Pro 2021.3?
The compiler outputs the following error messages:
Info: ******************************************************************* Info: Running Quartus Prime Synthesis Info: Version 21.3.0 Build 170 09/23/2021 SC Pro Edition Info: Processing started: Wed May 11 16:28:24 2022 Info: System process ID: 29918 Info: Command: quartus_syn --read_settings_files=on --write_settings_files=off counter -c counter Info: qis_default_flow_script.tcl version: #1 Info: Initializing Synthesis... Info: Project = "counter" Info: Revision = "counter" Info: Analyzing source files Error (13223): Verilog HDL or VHDL error: No key to decrypt data block Error (13223): Verilog HDL or VHDL error: decryption of data_block failed Error (17390): Verilog HDL error at counter.vp(13): error in protected region near / File: counter.vp Line: 13 Error (13223): Verilog HDL or VHDL error: No key to decrypt data block in file counter.vp Error (13223): Verilog HDL or VHDL error: decryption of data_block failed Info (19551): Verilog HDL info at counter.vp(41): endmodule File: counter.vp Line: 41 Info (19551): Verilog HDL info at counter.vp(41): ^ File: counter.vp Line: 41 Error (13411): Verilog HDL syntax error at counter.vp(41) near text endmodule File: counter.vp Line: 41 Error (19645): Verilog HDL error at counter.vp(41): SystemVerilog keyword endmodule used in incorrect context File: counter.vp Line: 41 Error: Flow failed:
Thanks in advance & Best regards,
Alex
