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Altera_Forum
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16 years ago

Debugging using the Quartus simulator?

Hi, I have designed a simple block to be programmed onto FPGA. Currently there is a bug which I am trying to find - I am using the quartus simulator and would like to know if annybody kn...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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Hi GPK,

what you descibe is pritty much what I was doing but am getting the following warnings when I start the simulation.

Info: Using vector source file "vhdl/peripherals.vwf"

Warning: Can't find node "tst_peripherals_trans:uut|counter[3]" for functional simulation. Ignored vector source file node.

this internal node is a register so bit surpried that it cannot be found - any ideas?

thanks,

John.

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Hi John,

did you choose "post-synthesis" Nodes ?

Kind regards

GPK