Forum Discussion
Altera_Forum
Honored Contributor
11 years ago --- Quote Start --- You can keep on using the 24mhz clock and 8 sample. You can simply define a counter and inside the always @(posedge clk) process you place the sampling in a conditional statement. For example: counter <= counter + 1; if (counter == 1000) begin <sample here the input> counter <= 0; end --- Quote End --- dude please help. i changed my debouncer to this one: module dbc(pbnoisy, clk, pbclean); input wire pbnoisy, clk; output reg pbclean; parameter N=8; reg [ N - 1 : 0 ] ctr; reg [ 12 : 0] M; initial begin M <= 0; pbclean <= 0; end always @(posedge clk) begin M = M + 1; if (M == 3_000_000) pbclean <= 1; else pbclean <= 0; end endmodule and on my main code i called it by this: wire pb3; dbc dbc3( !PB[3], ClOCK_24A, pb3); also i used this for incrementing: if (pb3) begin ctr <= ctr + 1; end however, nothing happens when i press PB[3]. what should be done?