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Altera_Forum
Honored Contributor
Honored ContributorDE1-SOC memory interface
I am trying to understand the memory interface between OpenCL generated code and the SDRAM. One thing that is puzzling me is the fact that the OpenCL interface is 256 bit wide (both in the board_env....
Altera_ForumHonored Contributor
Honored ContributorIt is very likely that your BSP path is incorrect. Did you look at the getting started guide and configure the paths correctly? There is a chapter on setting up the board for windows in http://www.terasic.com.tw/attachment/archive/836/de1soc_opencl_v02.pdf
