Honored Contributor
Honored ContributorThis is what I did. I created a file which simulates the FTDI's behaviour (as described in the datasheet) as part of my testbench.
However, it's hard to create all possible combinations of problems which may cause an error if You don't know what possible combinations may cause an error... By the way, it doesn't really matter how the data is transfered over USB. The FTDI has it's own protocoll and will provide any data that comes from it's USB interpreter, so on the FPGA's side, all You need to do is read bytes or write bytes on the application layer. Maybe I didn't fully get what You wanted to tell me. For debugging, I'm currently transferring an increasing counter (instead of the actual data). If it increases by a value which is not 1 (or doesn't increase at all), I know that something went wrong. I can trigger on such events with signaltap - I implemented a small interpretation module within the FPGA wich will generate an error signal if the previous value + 1 doesn't match the current value. Your's sincerely, Felix Lembcke
