Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi LouisMig,
I don't see anything wrong with the code except a minor mistake about using the library. These library should not be together use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; or use ieee.std_logic_arith.all; use ieee.std_logic_signed.all; or use ieee.numeric_std.all; I don't know what will happen if you will use them together like that. In our code, you should include these: library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; As I'm a bit hungry, I will eat something now :D But I wanna check if your simulated signal is correct, so can you show me the testbench simulation of the code with these signal: DAC_DB (in binary) and clockR? One more thing, are your sure the pins assignment for your DE0-70 is correct?