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CAlex's avatar
CAlex
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2 years ago

CycloneVsoc dev kit UART read from FPGA/HPS

Hi, My hardware is Cyclone V soc Dev kit with software of newest version of GHRD. I encountered several questions on handling the UART. 1. According to the GHRD QSYS HPS Mux Table: UART RX...
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi Alex


Is it possible that the HPS would send the data directly to the IP since the HPS has a copy of the data to be written into the RAM?

Could you elaborate what is a SPIM?


Regards

Jingyang, Teh


CAlex's avatar
CAlex
Icon for Contributor rankContributor
2 years ago

Hi,

it is shown on the first picture, it is SPIM0 MOSI and MISO.

I solved the problem , the loanIO need the preloader to init the system.

After the init it worked.

Reguards.