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Altera_Forum's avatar
Altera_Forum
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15 years ago

cyclone III unused inputs

Folks,

I'm working on a Cyclone III design with a BT.656 video input interface. The FPGA will be used in two products - one with the BT.656 circuitry populated and one without it populated. We would like to use a single FPGA design for both products, so I'm trying to figure out how to deal with those inputs.

Is it possible to switch input configuration to tri-state with bus-hold or pullup after the device has been configured? In other words, could I have the Nios II software change the applicable inputs' configuration after power-up?

Does anybody have any other ideas?

Thanks.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Weak pull-up would be my standard option. The additional current consumption is quite low, so you can set them generally. Bus hold or pull-up can't be set at runtime however. At runtime, only driving the unused pin as output would be available to prevent floating.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thanks FvM.

    I went ahead and assigned weak pullups on those pins, but apparently two of them do not support weak pullups so the build fails!

    I'm trying to find some documentation on those pins to determine why they don't support pullups but I'm not finding any documents that get that specific.

    The device is EP3C25F256A7and the failing pins are E1 and E2.

    Pin Planner is showing them as dedicated clock pins, so perhaps that's why they don't support weak pullups?
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    Pin Planner is showing them as dedicated clock pins, so perhaps that's why they don't support weak pullups?

    --- Quote End ---

    Yes. Programmable pull-up resistors are available for user I/O pins, not for dedicated clock pins, that are input only.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    There are a few unused I/O in the design that are pulled to ground through 10K resistors. Would it be possible to tie the video inputs to those pins, as well as the Video Input block without adversely effecting the design or the device?

    I'm trying that and have a build running right now. I just don't want to fry a chip...